Product Summary

The XCF32PV0G48C is an in-system programmable configuration PROM. Available in 1 to 32 Megabit (Mbit) densities, the XCF32PV0G48C provides an easy-to-use, cost-effective, and reprogrammable method for storing large Xilinx FPGA configuration bitstreams. The Platform Flash PROM includes both the 3.3V XCFxxS PROM and the 1.8V XCFxxP PROM. The XCF32PV0G48C version includes 4-Mbit, 2-Mbit, and 1-Mbit PROMs that support Master Serial and Slave Serial FPGA configuration modes.


XCF32PV0G48C absolute maximum ratings: (1)VCCINT, Internal supply voltage relative to GND: –0.5 to +4.0V; (2)VCCO, I/O supply voltage relative to GND: –0.5 to +4.0 V; (3)VCCJ, JTAG I/O supply voltage relative to GND:–0.5 to +4.0 V; (4)VIN, Input voltage with respect to GND: –0.5 to +3.6V; (5)VTS, Voltage applied to High-Z output: –0.5 to +3.6 V; (6)TSTG, Storage temperature (ambient): –65 to +150℃; (7)TJ, Junction temperature: +125℃.


XCF32PV0G48C features: (1)In-System Programmable PROMs for Configuration of Xilinx FPGAs; (2)Low-Power Advanced CMOS NOR FLASH Process; (3)Endurance of 20,000 Program/Erase Cycles; (4)Operation over Full Industrial Temperature Range (-40 to +85℃); (5)IEEE Standard 1149.1/1532 Boundary-Scan (JTAG) Support for Programming, Prototyping, and Testing; (6)JTAG Command Initiation of Standard FPGA Configuration; (7)Cascadable for Storing Longer or Multiple Bitstreams; (8)Dedicated Boundary-Scan (JTAG) I/O Power Supply (VCCJ); (9)I/O Pins Compatible with Voltage Levels Ranging From 1.5V to 3.3V; (10)Design Support Using the Xilinx Alliance ISE and Foundation ISE Series Software Packages.


XCF32PV0G48C block diagram



Data Sheet